[Bug 1001815] Freescale DSPI avoid Rx DMA if transfer fits in FIFO.

[bugzilla-daemon@bugs.ecos.sourceware.org]

Please do not reply to this email, use the link below.

http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001815

Ilija Kocho <ilijak@siva.com.mk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Depends on|                            |1001838

--- Comment #7 from Ilija Kocho <ilijak@siva.com.mk> ---
In addition the CDL part attachment 2237 complements attachment 2226 of bug
1001838

-- 
You are receiving this mail because:
You are on the CC list for the bug.