[Bug 1001815] Freescale DSPI avoid Rx DMA if transfer fits in FIFO.

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http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001815

Ilija Kocho <ilijak@siva.com.mk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|---                         |CURRENTRELEASE

--- Comment #4 from Ilija Kocho <ilijak@siva.com.mk> ---
Checked in a while ago.
Closing

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