More AT91SAM7S clock fixes

[Andrew Lunn]

Here is another AT91SAM7S fix. This builds on top of yesterdays fix of
the PLL setting. The crystal on the development board is not what i
thought it was which caused the baud rate generators to give the wrong
baud once the PLL was correctly configured. This patch fixes the CDL
default for the crystal and the PLL settings so that about the same
clock is acheived, which should be USB compatible. 

        Andrew

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Index: hal/arm/at91/at91sam7s/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/at91sam7s/current/ChangeLog,v
retrieving revision 1.3
diff -u -r1.3 ChangeLog
--- hal/arm/at91/at91sam7s/current/ChangeLog	28 Feb 2006 15:35:23 -0000	1.3
+++ hal/arm/at91/at91sam7s/current/ChangeLog	1 Mar 2006 20:39:27 -0000
@@ -1,3 +1,15 @@
+2006-03-01  Andrew Lunn  <andrew.lunn@ascom.ch>
+
+	* cdl/hal_arm_at91sam7s.cdl: Change the crystal frequency.  The
+	numbers printed on top of the crystal are misleading. It has a
+	18.432MHz crystal, not 20MHz. This error when combined with the
+	previous fix to the PLL made the serial baud rate wrong.  Change
+	the multiplier and divisor to achieve about the same CPU clock,
+	which should be USB compatible.
+	* src/at91sam7s_misc.c (hal_at91_us_baud): Need the same PLL fix
+	when calculating the baud rate dynamically.
+	* include/plf_io.h: Add the Programmable Clock Output registers.
+	
 2006-02-28  Oliver Munz <munz@speag.ch>
 
 	* include/hal_platform_setup.h: Fix the PLL multiplier settings
Index: hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl,v
retrieving revision 1.1
diff -u -r1.1 hal_arm_at91sam7s.cdl
--- hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl	19 Feb 2006 20:32:24 -0000	1.1
+++ hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl	1 Mar 2006 20:39:28 -0000
@@ -151,7 +151,7 @@
         display       "Main oscillator frequency"
         flavor        data
         legal_values { 3000000 to 20000000} 
-        default_value { 20000000 }
+        default_value { 18432000 }
         description   "
             What frequency of crystal is clocking the device."
     }
@@ -160,7 +160,7 @@
         display       "Divider for PLL clock"
         flavor        data
         legal_values  { 0 to 255 }
-        default_value 5
+        default_value 14
         description   "
             The X-tal clock is divided by this value when generating the
             PLL clock"
@@ -170,7 +170,7 @@
         display       "Multiplier for PLL clock"
         flavor        data
         legal_values  { 0 to 2047 }
-        default_value 24
+        default_value 145
         description   "
            The X-tal clock is multiplied by this value when generating
            the PLL clock."
Index: hal/arm/at91/at91sam7s/current/include/plf_io.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/at91sam7s/current/include/plf_io.h,v
retrieving revision 1.1
diff -u -r1.1 plf_io.h
--- hal/arm/at91/at91sam7s/current/include/plf_io.h	19 Feb 2006 20:32:24 -0000	1.1
+++ hal/arm/at91/at91sam7s/current/include/plf_io.h	1 Mar 2006 20:39:28 -0000
@@ -124,6 +124,9 @@
 #define AT91_PMC_MCKR_PRES_CLK_16 (4 << 2) // divide by 16
 #define AT91_PMC_MCKR_PRES_CLK_32 (5 << 2) // divide by 32
 #define AT91_PMC_MCKR_PRES_CLK_64 (6 << 2) // divide by 64
+#define AT91_PMC_PCKR0 0x40  // Programmable Clock Register 0
+#define AT91_PMC_PCKR1 0x44  // Programmable Clock Register 1
+#define AT91_PMC_PCKR2 0x48  // Programmable Clock Register 2
 #define AT91_PMC_IER  0x60 // Interrupt Enable Register
 #define AT91_PMC_IDR  0x64 // Interrupt Disable Register
 #define AT91_PMC_SR   0x68 // Status Register
Index: hal/arm/at91/at91sam7s/current/src/at91sam7s_misc.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/at91sam7s/current/src/at91sam7s_misc.c,v
retrieving revision 1.1
diff -u -r1.1 at91sam7s_misc.c
--- hal/arm/at91/at91sam7s/current/src/at91sam7s_misc.c	19 Feb 2006 20:32:25 -0000	1.1
+++ hal/arm/at91/at91sam7s/current/src/at91sam7s_misc.c	1 Mar 2006 20:39:29 -0000
@@ -166,7 +166,7 @@
     case AT91_PMC_MCKR_PLL_CLK:
       HAL_READ_UINT32((AT91_PMC+AT91_PMC_PLLR), pll);
       main_clock = CYGNUM_HAL_ARM_AT91_CLOCK_OSC_MAIN * 
-        (((pll & 0x7FF0000) >> 16) - 1) / (pll & 0xFF);
+        (((pll & 0x7FF0000) >> 16) + 1) / (pll & 0xFF);
       break;
   }