MPC8260 cache patch

[Robin Farine]

On Thu, 2003-03-27 at 19:53, Patrick Doyle wrote:

> There is still the underlying problem that, on the 8260, 'HAL_DCACHE_SYNC()'
> does not guarantee that main memory is coherent with the cache.  I have
> thought about changing the region that 'HAL_DCACHE_SYNC()' loads to be in
> flash rather than SDRAM

Sorry to insist, I can't resist. What matters is to have a 16Kb virtual
region reserved for cache flushing. That you map Flash, SDRAM, IO
registers isn't relevant, just choose the region with the fastest read
access time.

All this doesn't sound like a problem at all to me so I guess I'm
missing something. Someone cares to explain?

-- 
rnf