[ECOS] Re: Different section placement for kernel and application
Mon May 19 09:45:00 GMT 2014
Martin RÃ¶sch <martin.roesch <at> neratec.com> writes:
> On 2011-01-28, Grant Edwards <grant.b.edwards <at> gmail.com> wrote:
> > I'm curious why you want to do this. What benefit does it provide?
> I have to link a C++ Application to eCos (with FreeBSD Stack and uSTL) on
a STM32 derived board.
> The footprint is to big to run it from the internal flash. So we decided
to run it from external RAM.
> Unfortunately the performance regarding IRQ handling of a RAM Application
is too bad:
> Using the timers test from the STM32 variant HAL, I've set only TIM1
active and then varied the update
> interrupt period. It turned out, that with a period of 20msec. the IRQ
handler run into an Assertion in
> the post_dsr() function:
> ASSERT FAIL: <5>intr.cxxvoid Cyg_Interrupt::post_dsr() DSR list is
not empty but its head is 0
> Doing the same test with a ROM Application, the period can be lowered to
> So I'm trying to move the eCos library that contains the ISRs, DSRs etc.
to the Internal Flash while keeping
> the rest of the application (that has no ISRs and DSRs) still in the
> I hope this Setup will improve the IRQ handling.
I am about to start a new project using ecos (need to posix os with tcp/ip
stack) and I want to know roughly the footprint of the os.
Do you know how much does ecos with tcp/ip stack consume?
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