[ECOS] Re: Different section placement for kernel and application

[Martin Rösch]

Hi,

Thanks for your answers.

> In theory, you could apply section attributes to all of the kernel
> functions (or all of the application functions) so that you could
> separate them at link time into different output sections.

That's what I was thinking of. I think this can be achieved with a modified
version of the cortexm.ld linker script, which is used to generate the target.ld
linker script.
I studied the documentation of the GNU Linker Scripts and found some hints to
place the sections based from the input object file.
I made a try in the RAM Layout .ldi file:

// eCos memory layout

#include <pkgconf/hal.h>
#include <cyg/infra/cyg_type.inc>

MEMORY
{
    sram  : ORIGIN = 0x20000000, LENGTH = 0x00010000
    flash : ORIGIN = 0x08000000, LENGTH = 0x00080000
    rom   : ORIGIN = 0x60000000, LENGTH = 0x00800000
    ram1  : ORIGIN = 0x64000000, LENGTH = 0x00800000-CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
    ram2  : ORIGIN = 0x68000000, LENGTH = 0x00800000
}

SECTIONS
{
    SECTIONS_BEGIN
    SECTION_rom_vectors (flash, 0x08010000, LMA_EQ_VMA)
    SECTION_RELOCS (flash, ALIGN (0x8), LMA_EQ_VMA)
    .ecos.text ALIGN (0x8) : LMA_EQ_VMA
    {
    vectors.o(.text*) vectors.o(.gnu.warning) vectors.o(.gnu.linkonce.t.*) vectors.o(.init) vectors.o(.glue_7) vectors.o(.glue_7t)
    extras.o(.text*) extras.o(.gnu.warning) extras.o(.gnu.linkonce.t.*) extras.o(.init) extras.o(.glue_7) extras.o(.glue_7t)
    libtarget.a(.text*) libtarget.a(.gnu.warning) libtarget.a(.gnu.linkonce.t.*) libtarget.a(.init) libtarget.a(.glue_7) libtarget.a(.glue_7t)
    } > flash
    .ecos.rodata ALIGN (0x8) : LMA_EQ_VMA
    {
    FORCE_OUTPUT;
    vectors.o(.rodata*) vectors.o(.gnu.linkonce.r.*)
    extras.o(.rodata*) extras.o(.gnu.linkonce.r.*)
    libtarget.a(.rodata*) libtarget.a(.gnu.linkonce.r.*)  
    } > flash
    SECTION_sram (sram, 0x20000400, LMA_EQ_VMA)
    SECTION_text (ram1, 0x64008000, LMA_EQ_VMA)
    SECTION_fini (ram1, ALIGN (0x8), LMA_EQ_VMA)
    SECTION_rodata (ram1, ALIGN(0x8), LMA_EQ_VMA)
    SECTION_rodata1 (ram1, ALIGN (0x8), LMA_EQ_VMA)
    SECTION_fixup (ram1, ALIGN (0x8), LMA_EQ_VMA)
    SECTION_gcc_except_table (ram1, ALIGN (0x8), LMA_EQ_VMA)
    SECTION_eh_frame (ram1, ALIGN (0x8), LMA_EQ_VMA)
    SECTION_got (ram1, ALIGN (0x8), LMA_EQ_VMA)
    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
    SECTION_data (ram2, 0x68000000, LMA_EQ_VMA)
    SECTION_bss (ram2, ALIGN (0x8), LMA_EQ_VMA)
    SECTIONS_END
}

hal_vsr_table = 0x20000000;
hal_virtual_vector_table = hal_vsr_table + 128*4;
hal_startup_stack = 0x64800000;

With this modification the sections of the eCos components (from vectors.o, extras.o and libtarget.a)
are placed in the flash region when loaded with the RedBoot ROM monitor and GDB,
but a Bus error occurs in the reset_vector function:

Loading section .rom_vectors, size 0x8 lma 0x8010000
Loading section .ecos.text, size 0x10bcc lma 0x8010008
Loading section .ecos.rodata, size 0x49dc lma 0x8020bd8
Loading section .ARM.exidx, size 0x10 lma 0x64008000
Loading section .text, size 0x924 lma 0x64008010
Loading section .rodata, size 0x108 lma 0x64008938
Loading section .data, size 0xdcc lma 0x68000000
Start address 0x8010009, load size 93624
Transfer rate: 9 KB/sec, 300 bytes/write.

Program received signal SIGBUS, Bus error.
reset_vector () at [snip]/repo/ecos/packages/hal/cortexm/arch/current/src/vectors.S:100
100                ldr     sp,=hal_startup_stack

Is there a chance to get this working?

Greetings,

Martin

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