[ECOS] Change exceptions and interrupts Base for MIPS32
Nick Garnett
nickg@ecoscentric.com
Wed Feb 2 10:49:00 GMT 2011
Elad Yosef <elad.yosef@gmail.com> writes:
> Hi,
> In the MIPS32 4KEc there is another register in the Co-Processor
> EBase register - CP0 register #15 select 1
>
> The BEV bit defines whether the vectors are in RAM or bootstrap only.
>
> The RAM Base is always 0x8000:0000
> the Bootstrap Base is always 0xBFC0:0000
> The offsets (utlb, reset, other, int) for each location are constant.
>
> My flash is in other address range.
> The offsets are the like in RAM, but the base address is not RAM
>
> For example:
> Base - 0xB200:0000 == My rom_vectors location in flash
> other_vector offset == 0x180 (see MIPS 4KEc user manual)
>
> other_vector should be in 0xB200:0180
OK, I thought you simply wanted to switch to RAM vectors. Things like
this are usually done in a platform-specific hal_mon_init macro. If
you don't already have one then copy the hal_mon_init from variant.inc
and add something like:
la a0,reset_vector
mtc0 a0,ebase
Where ebase is defined as:
#define ebase $15,1 // Exception base register
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