[ECOS] Zero vector interrupts (SIVEC=0) on MPC8xxx

Danny Sade danny@channelot.com
Tue Sep 1 11:02:00 GMT 2009


Hi Christophe, 

> what type of CPU are you using?

I'm using 8247 (PowerQUICC II)

> I think the easiest way for you is to map the decrementer interrupt
> (CYGNUM_HAL_INTERRUPT_DECREMENTER) to something else then 0 and change your variant.inc to
> handle it properly until you find the reason for the spurious interrupts.

I wasn't aware to this mapping option. For the mean time I've defined the macro cygpkg_plf_intc_handler
in my plf_regs.h, and I'm using this macro to identify this case and map the zero vector interrupt to some
other vector which I don't use.

In any case, as far as I understand, an ISR for this zero vector interrupt should always be provided since these
Interrupts are asserted during normal operation.

Thanks

Danny

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