[ECOS] how to handle missed interrupt issue?
Fri Feb 6 11:41:00 GMT 2009
On Thu, Feb 5, 2009 at 6:12 PM, Nick Garnett <email@example.com> wrote:
> Dave Milter <firstname.lastname@example.org> writes:
>> Some days ago I started development of ecos's driver for some device
>> which compatible with ARINC 429.
>> Processor is belong to ARM9 family, freq is 200Mhz.
>> The logic is simple. Driver has circular buffer, and when it receive
>> from device interrupt, which means that it ready
>> to go, driver send to device next 32bit word, then it recieves next
>> interrupt and send next word and so on.
>> When driver sends all characters from circular buffer, it start from
>> begining of buffer.
>> Now I want implement function to change circular buffer pointer,
>> but if I do such simple thing:
>> change pointer
>> there is probability that I lost interrupt between cyg_drv_isr_lock()
>> and cyg_drv_isr_unlock(),
>> and this of cause a problem, I willl wait interrupt and it never happens.
> You shouldn't lose any interrupts, the interrupt controller will
> remember that the interrupt occurred and deliver it when interrupts
> are unmasked. The worst that will happen is that the interrupt will be
> delivered slightly late. What you propose above should work just fine.
Thanks for reply,
property of what part of processor provide such behaviour?
arm core or interrupt controller?
I mean where I can read about it, I look at docs on arm site and at
documentation on my processor,
and nowhere this is mentioned explicity.
Or this possible by decisign, interrupt is clear by ecos in arm core,
interrupt controller still works, and it set IRQ or FIQ line in 1,
and when I reenable interrupts, interrupt is happened?
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