[ECOS] Re: Cortex-M3 interrupt handling & context switching

Keith Ross kross@elands.co.nz
Tue Oct 7 08:46:00 GMT 2008


> Simon Kallweit wrote:
> ... I'm again faced with the proper implementation of interrupt 
> handling and context switching. I'm still a bit puzzled, and would 
> really appreciate some help, if anyone knows a bit of the Cortex-M3 
> architecture and the ecos kernel. I would like to use the Cortex's 
> feature of saving/restoring some of the processors state automatically 
> when entering/leaving exceptions (namely pc, lr, r12, r0-r3)....
Sorry Simon, I've had a look at the manual and your code. But I haven't 
written any code.

I'll continue to plod though it but without JTAG I can't check any code. 
The people from ST could be well placed to do this bit (?) or maybe one 
of the people who put there hand up for the cortex port in the past.

Simon,  your code outline sounds good. I'll look into this a little more.

Keith



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