[ECOS] STM32 interrupt definitions
Mon Nov 24 19:40:00 GMT 2008
Simon Kallweit <firstname.lastname@example.org> writes:
> Chris Holgate discovered a little inconsistency in the interrupt
> vector definitions, we have:
> #define CYGNUM_HAL_INTERRUPT_DMA0_CH1
> #define CYGNUM_HAL_INTERRUPT_DMA0_CH2
> #define CYGNUM_HAL_INTERRUPT_DMA2_CH1
> #define CYGNUM_HAL_INTERRUPT_DMA2_CH2
> In the STM32 reference manual the first set is named only DMA, the
> second set DMA2, which seems inconstant too. Can we agree to call them
That seems like a sensible thing to do.
This is partly down to ST's annoying habit of numbering devices from 1
rather that 0.
I'll check in a fix for this when I apply your recent patches.
Nick Garnett eCos Kernel Architect
eCosCentric Limited http://www.eCosCentric.com The eCos experts
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