[ECOS] STM32 interrupt definitions

[Nick Garnett]

Simon Kallweit <simon.kallweit@intefo.ch> writes:

> Hi
> 
> Chris Holgate discovered a little inconsistency in the interrupt
> vector definitions, we have:
> 
> #define CYGNUM_HAL_INTERRUPT_DMA0_CH1
> (11+CYGNUM_HAL_INTERRUPT_EXTERNAL)
> #define CYGNUM_HAL_INTERRUPT_DMA0_CH2
> (12+CYGNUM_HAL_INTERRUPT_EXTERNAL)
> ...
> 
> and
> 
> #define CYGNUM_HAL_INTERRUPT_DMA2_CH1
> (56+CYGNUM_HAL_INTERRUPT_EXTERNAL)
> #define CYGNUM_HAL_INTERRUPT_DMA2_CH2
> (57+CYGNUM_HAL_INTERRUPT_EXTERNAL)
> ...
> 
> In the STM32 reference manual the first set is named only DMA, the
> second set DMA2, which seems inconstant too. Can we agree to call them
> DMA1/DMA2?

That seems like a sensible thing to do.

This is partly down to ST's annoying habit of numbering devices from 1
rather that 0.

I'll check in a fix for this when I apply your recent patches.


-- 
Nick Garnett                                      eCos Kernel Architect
eCosCentric Limited    http://www.eCosCentric.com      The eCos experts
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