[ECOS] eCos docs conflating Ethernt MII and MI interface?

Andrew Lunn andrew@lunn.ch
Wed Jul 16 17:44:00 GMT 2008


On Wed, Jul 16, 2008 at 04:09:39PM +0000, Grant Edwards wrote:
> I've been looking at the doc page below:
> 
>  http://www.ecos.sourceware.org/docs-latest/ref/io-eth-phy-generic1.html
> 
> The page appears to be conflating the MII and MI interfaces to
> a PHY.  Based on the data structure and some parts of the
> description I think the page it talking about the two-wire,
> half-duplex, bit-serial serial management interface (aka MI or
> SMI).  
> 
> But, in other parts, it talks about the MII interface between
> the MAC and the PHY. MII (media independant interface) is a
> 16-wire, nibble-wide, full-duplex interface that's used to
> transfer Ethernet frames and control/status info between the
> MAC and the PHY.

I always thought the SMI was a subpart of the MII. The code in the phy
package is about using the SMI part of the MII. This webpage describes
this:

http://www.interfacebus.com/Connector_MII_Ethernet_Pinout.html

Also, take a look at IEEE 802.3-2005 Section 4, section 45.2:

      The management interface specified in Clause 22 provides a
      simple, two signal, serial interface to connect a Station
      Management entity and a managed PHY for providing access to
      management parameters and ser vices. The interface is referred
      to as the MII management interface.

 
> MII and MI are completely separate interfaces, and it's not
> clear which interface this page is describing. At one point it
> talks about using "set_data(), get_data(), set_clock(),
> set_dir() are used to control the MII signals and run the
> protocol." That must be referring to MI instead of MII.

The PHY package provides two mechanisms for using the SMI. The package
can do the bit banging of these two pins itself. Or it can make use of
hardware bit-banging which many ethernet device provide. The PHY
package hides these details so that the PHY driver does not have to
care how it accesses the PHY registers.

> IIRC, the same PHY registers are generally available via both
> MII and MI.

That is because they are one and the same...

However, i agree, the text could be better.

         Andrew

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