[ECOS] Can excessive/intensive serial flow cause stack overflow?

[Andrew Lunn]

On Thu, Jul 03, 2008 at 05:06:48PM +0200, Alexandre wrote:
> On Thu, Jul 3, 2008 at 4:58 PM, Alexandre <thekyz@gmail.com> wrote:
> > TRACE: intr.cxx            [  86] Cyg_Interrupt::Cyg_Interrupt()
> >                                                         ((vector=7,
> > priority=4, data=40000860, isr=000049ec, dsr=00004a3c))
> 
> Let's try to advance by myself :)
> 
> CYGNUM_HAL_INTERRUPT_UART1 is interrupt 7 so there must be an error around this.
> Can't both UARTs use the same priority level & if not, how can I change that ?

Nope. Look at the code where the asserts are. Interrupts < 16 need to be unique. 

However, i don't quite get this:

lunn@londo:~/eCos/anoncvs-clean/packages/hal/arm/lpc2xxx$ grep -r CYGNUM_HAL_INTERRUPT_UART *
var/current/src/hal_diag.c:      CYGNUM_HAL_INTERRUPT_UART0, 
var/current/src/hal_diag.c:      CYGNUM_HAL_INTERRUPT_UART1, 
var/current/include/hal_var_ints.h:#define CYGNUM_HAL_INTERRUPT_UART0   6
var/current/include/hal_var_ints.h:#define CYGNUM_HAL_INTERRUPT_UART1   7

So the default setup is they have different interrupt values.

Does your target override the values from the variant package?

Maybe there is something more subtle going on here.

      Andrew

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