[ECOS] Can excessive/intensive serial flow cause stack overflow?

[Alexandre]

> Where is debug output going? Given your serial port setup, would you
> see it? If you have a jtag debugger, set a breakpoint in
> cyg_assert_fail and see if it hits.

I have set both diagnostic & debug output to UART1.
I don't have JTAG debugging setup on this platform.
Is there a way I can check things without using JTAG from there ?

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