[ECOS] dsr_list not initialized as NULL
Tue Jan 8 11:30:00 GMT 2008
I'm working with ecos on an soft-core processor on Xilinx FPGA ml401 board.
And I found that the Cyg_Interrupt::dsr_list[CYGNUM_KERNEL_CPU_MAX] (it is
an single processor system) in my system is not initialized as NULL. Thus it
cause the dsr_pending() check to always be true and also cause the system
point to invalid pointer.
Since the dsr_list is defined as volatile, just wondering if the HAL level
has some funtion to alter it and cause the trouble? Or it is simply the
memory on FPGA not initialized with all zero?
I found the same .exe file works fine on the simulation processor on my host
inline cyg_bool Cyg_Interrupt::DSRs_pending()
HAL_SMP_CPU_TYPE cpu = CYG_KERNEL_CPU_THIS();
return dsr_table_head[cpu] != dsr_table_tail[cpu];
return dsr_list[cpu] != NULL;
Thanks and regards,
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