[ECOS] PowerPC Redboot porting problems

Tales Toledo toledo.tales@gmail.com
Wed Jun 20 21:46:00 GMT 2007


Hi,

I'm facing some problems trying to port redboot to MPC885...
I have tried to follow the steps suggested at porting guide. I'm using only
RAM as a first step but unfortunately I can get success. I'm using
Viper files as reference.

I'm using gdb with mpcbdm and get always the same exception when
running it from RAM.

------------------------------------------------------------
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This GDB was configured as "--host=i686-pc-linux-gnu --target=powerpc-linux".
MPCBDM version 1.2.2 / 2001/06/14
got access rights for printer port 0 addr 0x378..0x37A
disabled power at port 0
Power: turned on powering from port 0
adapter version 2 initialized
Waiting freeze:
Target freeze:
*** init
Target cpu PVR=0x00500000 PARTNUM=0x09 MASKNUM=0x00 REV_NUM=0x0000
warning: unknown CPU. Using default register description
BDM initialized
0x100 in ?? ()
(gdb) mpcbdm mem load "/home/toledo/redboot.bin" 0
 len = 0x000250c0, total file length
(gdb) j *0x100
Continuing at 0x100.
*** run
*** Resume
*** wait freeze
Waiting freeze:
Target freeze:

Program received signal SIGINT, Interrupt.
CR := (CR0|4CR1|8CR2|12CR3|16CR4|20CR5|24CR6|28CR7)
SPR 2:Condition Register, UM140
CR = 0x2042488d =
(CR0=0x2|CR1=0x0|CR2=0x4|CR3=0x2|CR4=0x4|CR5=0x8|CR6=0x8|CR7=0xd)
ICR := (|RST|CHSTP|MCI||6EXTI|ALI|PRI|FPUVI|DECI||13SYSI|TR||17SEI|ITLBMS|DTBLMS|ITLBER|DTLBER||28LBRK|IBRK|EBRK|DPI)
SPR 148:Interrupt Cause Register, UM994
ICR = 0x00004000 = (SEI)
0x42004 in ?? ()
(gdb)
------------------------------------------------------------

Here are the RAM memory map files used.

------------------------------------------------------------
// eCos memory layout - Thu May 30 10:27:39 2002

// This is a generated file - do not edit

#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>

#endif
#define CYGMEM_REGION_ram (0)
#define CYGMEM_REGION_ram_SIZE (0x2000000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved_vectors) [];
#endif
#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors))
#define CYGMEM_SECTION_reserved_vectors_SIZE (0x3000)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved_vsr_table) [];
#endif
#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME
(__reserved_vsr_table))
#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved_virtual_table) [];
#endif
#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME
(__reserved_virtual_table))
#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved_for_rom) [];
#endif
#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (__reserved_for_rom))
#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x3cd00)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (CYGMEM_REGION_ram_SIZE - (size_t)
CYG_LABEL_NAME (__heap1))
------------------------------------------------------------

------------------------------------------------------------
// eCos memory layout - Thu May 30 10:27:39 2002

// This is a generated file - do not edit

#include <cyg/infra/cyg_type.inc>

MEMORY
{
   ram : ORIGIN = 0, LENGTH = 0x2000000
}

SECTIONS
{
   SECTIONS_BEGIN
   CYG_LABEL_DEFN(__reserved_vectors) = 0; . =
CYG_LABEL_DEFN(__reserved_vectors) + 0x3000;
   CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); . =
CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
   CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); . =
CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100;
   CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10); . =
CYG_LABEL_DEFN(__reserved_for_rom) + 0x3cd00;
   SECTION_vectors (ram, ALIGN (0x10), LMA_EQ_VMA)
   SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)
   SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)
   SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA)
   SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA)
   SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)
   SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
   SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA)
   SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA)
   SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA)
   CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
   SECTIONS_END
}
------------------------------------------------------------

Here is also a disassembled excerpt redboot.sym file from
(powerpc-eabi-objdump -D powerpc:MPC8XX redboot.elf > redboot.sym)

------------------------------------------------------------
Disassembly of section .text:

00042000 <_start>:
  42000:       3c 60 00 00     lis     r3,0
  42004:       60 63 00 07     ori     r3,r3,7
  42008:       7c 7e 23 a6     mtictrl r3
  4200c:       38 60 00 00     li      r3,0
  42010:       7c 75 23 a6     mtder   r3
  42014:       3c 60 04 00     lis     r3,1024
  42018:       60 63 00 00     ori     r3,r3,0
  4201c:       7c 00 04 ac     sync
  42020:       7c 78 8b a6     mtspr   568,r3
  42024:       3c 60 04 00     lis     r3,1024
  42028:       60 63 00 00     ori     r3,r3,0
  4202c:       4c 00 01 2c     isync
  42030:       7c 70 8b a6     mtspr   560,r3
  42034:       4c 00 01 2c     isync
  42038:       7c 70 c2 a6     mfmi_ctr        r3
  4203c:       64 63 20 00     oris    r3,r3,8192
  42040:       7c 70 c3 a6     mtspr   784,r3
  42044:       7c 78 c2 a6     mfmd_ctr        r3
  42048:       64 63 20 00     oris    r3,r3,8192
  4204c:       7c 78 c3 a6     mtspr   792,r3
  42050:       3c 60 00 00     lis     r3,0
  42054:       60 63 10 02     ori     r3,r3,4098
  42058:       7c 00 04 ac     sync
  4205c:       7c 60 01 24     mtmsr   r3
  42060:       7c 00 04 ac     sync
  42064:       3c 40 00 06     lis     r2,6
  42068:       60 42 d0 40     ori     r2,r2,53312
  4206c:       7c 63 1a 78     xor     r3,r3,r3
  42070:       7c 7c 43 a6     mttbl   r3
  42074:       7c 84 22 78     xor     r4,r4,r4
  42078:       7c 9d 43 a6     mttbu   r4
  4207c:       48 00 95 f1     bl      4b66c <hal_hardware_init>

00042080 <_hal_hardware_init_done>:
  42080:       3c 60 00 03     lis     r3,3
  42084:       60 63 ff fc     ori     r3,r3,65532
  42088:       3c 80 ff ff     lis     r4,-1
  4208c:       60 84 ff fc     ori     r4,r4,65532
  42090:       3c a0 00 04     lis     r5,4
  42094:       60 a5 1f 30     ori     r5,r5,7984
  42098:       84 03 00 04     lwzu    r0,4(r3)
  4209c:       94 04 00 04     stwu    r0,4(r4)
  420a0:       7c 03 28 40     cmplw   r3,r5
  420a4:       40 82 ff f4     bne+    42098 <_hal_hardware_init_done+0x18>
  420a8:       3c 20 00 06     lis     r1,6
  420ac:       60 21 62 40     ori     r1,r1,25152
  420b0:       7c 30 43 a6     mtsprg  0,r1
  420b4:       3c 60 00 04     lis     r3,4
  420b8:       60 63 00 00     ori     r3,r3,0
  420bc:       3c 80 00 00     lis     r4,0
  420c0:       60 84 00 00     ori     r4,r4,0
  420c4:       3c a0 00 04     lis     r5,4
  420c8:       60 a5 1f 34     ori     r5,r5,7988
  420cc:       7c 03 28 40     cmplw   r3,r5
  420d0:       41 82 00 20     beq-    420f0 <_hal_hardware_init_done+0x70>
  420d4:       38 63 ff fc     addi    r3,r3,-4
  420d8:       38 84 ff fc     addi    r4,r4,-4
  420dc:       38 a5 ff fc     addi    r5,r5,-4
  420e0:       84 03 00 04     lwzu    r0,4(r3)
  420e4:       94 04 00 04     stwu    r0,4(r4)
  420e8:       7c 03 28 40     cmplw   r3,r5
  420ec:       41 80 ff f4     blt+    420e0 <_hal_hardware_init_done+0x60>
  420f0:       3c 60 00 04     lis     r3,4
  420f4:       60 63 21 d4     ori     r3,r3,8660
  420f8:       3c 80 00 00     lis     r4,0
  420fc:       60 84 30 00     ori     r4,r4,12288
  42100:       38 84 ff fc     addi    r4,r4,-4
  42104:       38 a0 00 20     li      r5,32
  42108:       94 64 00 04     stwu    r3,4(r4)
  4210c:       38 a5 ff ff     addi    r5,r5,-1
  42110:       2c 05 00 00     cmpwi   r5,0
  42114:       40 82 ff f4     bne+    42108 <_hal_hardware_init_done+0x88>
  42118:       3c 60 00 04     lis     r3,4
  4211c:       60 63 22 dc     ori     r3,r3,8924
  42120:       3c 80 00 00     lis     r4,0
  42124:       60 84 30 00     ori     r4,r4,12288
  42128:       90 64 00 14     stw     r3,20(r4)
  4212c:       90 64 00 24     stw     r3,36(r4)
  42130:       3c 60 00 06     lis     r3,6
  42134:       60 63 52 40     ori     r3,r3,21056
  42138:       3c 80 00 07     lis     r4,7
  4213c:       60 84 bb f0     ori     r4,r4,48112
  42140:       38 00 00 00     li      r0,0
  42144:       7c 03 20 40     cmplw   r3,r4
  42148:       41 82 00 14     beq-    4215c <_hal_hardware_init_done+0xdc>
  4214c:       90 03 00 00     stw     r0,0(r3)
  42150:       38 63 00 04     addi    r3,r3,4
  42154:       7c 03 20 40     cmplw   r3,r4
  42158:       41 80 ff f4     blt+    4214c <_hal_hardware_init_done+0xcc>
  4215c:       3c 60 00 06     lis     r3,6
  42160:       60 63 50 c0     ori     r3,r3,20672
  42164:       3c 80 00 06     lis     r4,6
  42168:       60 84 52 38     ori     r4,r4,21048
  4216c:       7c 03 20 40     cmplw   r3,r4
  42170:       41 82 00 14     beq-    42184 <_hal_hardware_init_done+0x104>
  42174:       90 03 00 00     stw     r0,0(r3)
  42178:       38 63 00 04     addi    r3,r3,4
  4217c:       7c 03 20 40     cmplw   r3,r4
  42180:       41 80 ff f4     blt+    42174 <_hal_hardware_init_done+0xf4>
  42184:       38 21 ff f4     addi    r1,r1,-12
  42188:       38 00 00 00     li      r0,0
  4218c:       90 01 00 00     stw     r0,0(r1)
  42190:       90 01 00 08     stw     r0,8(r1)
  42194:       94 21 ff c8     stwu    r1,-56(r1)
  42198:       48 00 93 15     bl      4b4ac <hal_variant_init>
  4219c:       48 00 94 91     bl      4b62c <hal_platform_init>
  421a0:       48 00 90 09     bl      4b1a8 <hal_MMU_init>
  421a4:       3c 60 00 00     lis     r3,0
  421a8:       60 63 10 32     ori     r3,r3,4146
  421ac:       7c 00 04 ac     sync
  421b0:       7c 60 01 24     mtmsr   r3
  421b4:       7c 00 04 ac     sync
  421b8:       48 00 90 79     bl      4b230 <hal_enable_caches>
  421bc:       48 00 90 b1     bl      4b26c <hal_IRQ_init>
  421c0:       48 00 8f 21     bl      4b0e0 <cyg_hal_invoke_constructors>
  421c4:       48 00 af e5     bl      4d1a8 <initialize_stub>
  421c8:       48 00 c7 79     bl      4e940 <hal_ctrlc_isr_init>
  421cc:       48 00 e0 65     bl      50230 <cyg_start>
  421d0:       48 00 00 00     b       4
------------------------------------------------------------
- Hide quoted text -

If necessary I can also attach 885board.S for reference.

I appreciate any help.

Thx,
TT

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