[ECOS] ARM architectural HAL questions (related to porting)

Mike Sweeney msweeney77@gmail.com
Mon Jun 4 01:33:00 GMT 2007

I am porting eCos to a new platform and XScale variant so I have some
questions related to the ARM architectural HAL. I have a custom board
and have NAND flash that I am going to burn my eCos image into. I have
my own loader that copies the complete image from NAND flash into the
image's load address in RAM. Since the RAM on my board is not located
at 0x0, early in the eCos HAL startup code I am going to enable the
MMU and locate RAM at 0x0(seems like PLATFORM_SETUP1 is the right
place). My code will be linked to address 0x0 so the initial startup
code will need to be position independent before the MMU kicks in.
Hopefully this will help provide context in answering my questions

My intended mode of startup seems to correspond to the RAM startup
type but it doesn't seem to fit perfectly into this characterization
based on the ARM architectural HAL implementation (vectors.S).

1) In vectors.S there is this code:

        // Come here to reset board

#if defined(CYG_HAL_STARTUP_RAM) && \
        mrs     r7,cpsr                 // move back to IRQ mode
        and     r7,r7,#CPSR_MODE_BITS
        cmp     r7,#CPSR_SUPERVISOR_MODE
        beq     start

        // We cannot access any LED registers until after PLATFORM_SETUP1
        LED 7

        mov     r0,#0           // move vectors
        ldr     r1,=__exception_handlers


        ldr     r2,[r1,#0x08]   // software interrupt
        str     r2,[r0,#0x08]


I don't understand what this code is doing. The comment says "move
back to IRQ mode". If the processor is not in Supervisor mode then it
does some stuff as you can see above, but I don't see how it is
changing any mode here. What is the purpose of this code?

2) In this code from vectors.S:

        // Reset software interrupt pointer
        mov     r0,#0           // move vectors
        ldr     r1,.__exception_handlers
#if defined(CYG_HAL_STARTUP_RAM) && \
        cmp     r7,#CPSR_SUPERVISOR_MODE
        beq     10f
        ldr     r2,[r1,#0x28]   // software interrupt
        str     r2,[r0,#0x28]

Why is the software interrupt vector only relocated if you are not in
supervisor mode, similar to the code snippet posted in question 1

3) In vectors.S there is then code to copy the vector table and fixed
vectors to address 0x0. In my linker script couldn't I just link the
".vectors" section to address 0x0 and then there would be no need for
"hal_vsr_table" in the fixed_vectors section? Basically my loader
would copy my entire flash image into RAM at some load address and
when I turn the MMU on .vectors would now be located at 0x0 without
the need for a copy operation. It seems I can get by without doing
what I suggest here and just using the default implementation in
vectors.S here but I am more curious as to whether my approach is
technically feasible.

I know this is long but I appreciate any answers!

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