[ECOS] Re: eCos invalidating JTAG on ARM architecture ?
Tue Jul 10 10:15:00 GMT 2007
On Tue, Jul 10, 2007 at 11:56:12AM +0200, Alexandre wrote:
> Ok I implemented that and it enabled me to know what in vectors.S was
> disabling JTAG. Ironically, i shortened it to the "bl cyg_start"
> instruction at the end of the "start:" label (last instruction for
> this label i think).
> I find it weird because it would mean the launch of the actual kernel
> software is what makes it impossible for me to debug further.
> Do you know where i can find that "cyg_start" label vectors.S is
> referring to and is it worth it lurking that way ?
cyg_start is one of the entry points into the application code. So it
may be coming from the application. If not, eCos provides a cyg_start
You say that the CSPR is invalid? Does the branch to cyg_start jump to
a valid address? It could be that the address is invalid and causes an
exception? Seems unlikely, but i cannot think of anything else.
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