[ECOS] Re: problem enabling the caches on powerpc

saurabh prakash saurabhp75@gmail.com
Fri Jun 30 09:23:00 GMT 2006


>Disable the burst for this memory area. You can do that by setting
>bit 23 (BIH) in the OR register of that particular memory bank.
>Doing this will:
>1) Give you confidence that there is indeed a problem to be fixed
>with the UPM table
>2) Keep your software development going while you look for a

>Anthony Tonizzo

1) I have disabled the burst access for the device, but i am still
facing problems.
    the behaviour is somewhat random, sometimes it gets stuck   in
"hal_cache_enable()" and sometimes the execution get stuck in a loop
at memory location 0x0, having labels : CYGARC_JMPBUF_RX. i am
clueless, from where to start looking for the problem.

2) there is a mail(URL below) on this list regarding improper
initialization of the caches on powerpc architecture. the patch is
also attached alongwith, but that patch has not been incorporated. Any
comments on this?


3) the board works well when CACHES and MMU are disabled except for
one thing. when i define a static variable more than 512K size, the
initialization gets stuck in vectors.S file whicle copying the bss
section. the sdram on my board is 64 MB. Could this problem and the
cache enabling problem be linked?

Is there any limit in ecos to the size of the :
  1) static variables
  2) bss section
  3) heap

thanks in advance,
saurabh prakash,
Team Leader, C-DOT

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