[ECOS] SCC2 of MPC860 in HDLC internal loopback mode

Aditya Veer Singh adityaveer@gmail.com
Fri Jul 21 04:14:00 GMT 2006


I am using MPC860 based board, and want to configure SCC2 in HDLC mode
in internal loop back.
I have set all the register according the User Mannual of MPC860 and
even the clock are provided.
Interrrupt is created and attached to it.
The Rx and Tx buffers are also created and initialized.
Now when I try to write something to the Tx buffer by setting its
buffer and set txbd->ctrl = 0x9C00.
An interupt should be generated as the data from Tx should be copied
to Rx buffer and ISR attached should be called now.
But this does not happen.
What can possibly wrong here?


Code for intialization:
  const int scc_no = 1;
  unsigned char  *Hdlc2_txptr,*Hdlc2_rxptr;
  int TxBD_BASE_SCC2,RxBD_BASE_SCC2;
  volatile EPPC *immr_ptr = (volatile EPPC *)eppc_base();
  struct cp_bufdesc * rxbd,*txbd;
  volatile struct scc_regs *scc;

  qi = (struct quicc_hdlc_info *)malloc(sizeof(struct quicc_hdlc_info));

  cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_CPM_SCC2,
                             CYGARC_SIU_PRIORITY_HIGH,
                             0,
                             (cyg_ISR_t *)quicc_scc2_isr,
                             (cyg_DSR_t *)scc2_drv_dsr,
                             &quicc_scc2_interrupt_handle,
                             &quicc_scc2_interrupt);
  cyg_drv_interrupt_attach(quicc_scc2_interrupt_handle);
  cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_CPM_SCC2);
  cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_CPM_SCC2);

  immr_ptr ->pio_papar |= 0x000C ;
  immr_ptr ->pio_padir &= ~0x000C ;
  immr_ptr ->pio_paodr &= ~0x000C;

  immr_ptr->pio_pcpar &= ~0x00C2;
  immr_ptr->pio_pcdir |= 0x00C2;
  immr_ptr->pio_pcso &= ~0x00C2;

   immr_ptr -> si_sicr |= 0x00002C00;

   RxBD_BASE_SCC2 = _mpc8xx_allocBd( NOSCC2RXBUF * sizeof(struct cp_bufdesc));
   TxBD_BASE_SCC2 = _mpc8xx_allocBd( NOSCC2TXBUF * sizeof(struct cp_bufdesc));

   txbd = (struct cp_bufdesc *)((char *)immr_ptr + TxBD_BASE_SCC2);
   rxbd = (struct cp_bufdesc *)((char *)immr_ptr + RxBD_BASE_SCC2);

   qi->tbase = txbd;
   qi->txbd = txbd;
   qi->tnext = txbd;
   qi->rbase = rxbd;
   qi->rxbd = rxbd;
   qi->rnext = rxbd;
   qi->txactive = 0;


  immr_ptr->pram[scc_no].scc.pscc.h.rbase = RxBD_BASE_SCC2;
  immr_ptr->pram[scc_no].scc.pscc.h.tbase = TxBD_BASE_SCC2;

  immr_ptr->cp_cr = 0x0041; /* Initialize Rx and Tx Parameters Command */

  while(immr_ptr -> cp_cr & 0x0001)
  {
        immr_ptr -> cp_cr |= 0x0040;
  }

  immr_ptr -> pram[scc_no].scc.pscc.h.rfcr = 0x10;
  immr_ptr -> pram[scc_no].scc.pscc.h.tfcr = 0x10;
  immr_ptr -> pram[scc_no].scc.pscc.h.mrblr = 0x05F0;

  immr_ptr -> pram[scc_no].scc.pscc.h.c_mask = 0x0000F0B8;
  immr_ptr -> pram[scc_no].scc.pscc.h.c_pres = 0x0000FFFF;
  immr_ptr -> pram[scc_no].scc.pscc.h.disfc = 0x0000;
  immr_ptr -> pram[scc_no].scc.pscc.h.crcec = 0x0000;
  immr_ptr -> pram[scc_no].scc.pscc.h.abtsc = 0x0000;
  immr_ptr -> pram[scc_no].scc.pscc.h.nmarc = 0x0000;
  immr_ptr -> pram[scc_no].scc.pscc.h.retrc = 0x0000;
  immr_ptr -> pram[scc_no].scc.pscc.h.mflr = 0x05F0;
  immr_ptr -> pram[scc_no].scc.pscc.h.rfthr = 0x0001;
  immr_ptr -> pram[scc_no].scc.pscc.h.hmask = 0x0000;
  immr_ptr -> pram[scc_no].scc.pscc.h.haddr1 = 0x0000;
  immr_ptr -> pram[scc_no].scc.pscc.h.haddr2 = 0x0000;
  immr_ptr -> pram[scc_no].scc.pscc.h.haddr3 = 0x0000;
  immr_ptr -> pram[scc_no].scc.pscc.h.haddr4 = 0x0000;

  /* Initialize the SCC parameters */
  immr_ptr -> scc_regs[scc_no].scc_scce = 0xFFFF;
  immr_ptr -> scc_regs[scc_no].scc_sccm = 0x001C;
  immr_ptr -> scc_regs[scc_no].scc_gsmr_h = 0x00000000;
  immr_ptr -> scc_regs[scc_no].scc_gsmr_l = 0x00000040;
  immr_ptr -> scc_regs[scc_no].scc_dsr = 0x7E7E;
  immr_ptr -> scc_regs[scc_no].scc_psmr = 0x1000;


 /*Initialize the Buffer Descriptors */
  Hdlc2_txptr = &Hdlc2_txbuf[0];
  Hdlc2_rxptr = &Hdlc2_rxbuf[0];

  int i;
  for (i = 0 ; i < NOSCC2RXBUF ; i++)
  {
    rxbd->ctrl = 0x9000;
    rxbd->buffer = (volatile char *)(Hdlc2_rxptr + (i * SCC2RXBUFSZ));
    rxbd->length = 0x0000;
        rxbd++;
  }
  rxbd--;
  rxbd->ctrl = 0xB000;

 for (i = 0 ; i < NOSCC2TXBUF ; i++)
 {
    txbd->ctrl = 0x0C00;
    txbd->buffer = (volatile char*)(Hdlc2_txptr + (i * SCC2TXBUFSZ));
    txbd->length = 0x0000;
 }
 txbd--;
 txbd->ctrl = 0x2C00;

 scc = &immr_ptr->scc_regs[1];

 immr_ptr->cp_cr = 0x0001;
        while (immr_ptr->cp_cr & 0x0041) ;

 scc->scc_scce = 0xFFFF;
 scc->scc_sccm = 0x001A;
 scc->scc_gsmr_h = 0x0;
 scc->scc_gsmr_l = 0x0;
 scc->scc_dsr = 0x7E7E;
 scc->scc_psmr = 0x1000;

Regards and Thanks,
Aditya

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