[ECOS] Possible fix for interrupt latency problems on Arm

Mike mjs2@ovus.co.uk
Fri Jul 14 11:50:00 GMT 2006


I have been looking at why my Arm LPC2220 board occasionally gets 
terrible interrupt latencies. This happens particularly when the 
interrupt I'm interested in occurs whilst ecos is doing processing after 
a TIMER0 (ecos RTC) interrupt.

It seems that interrupt_end() is called from 
hal/arm/arch/current/src/vectors.s with interrupts disabled, whereas it 
looks to me like interrupt_end() has been designed to run with 
interrupts enabled in order for DSRs to be interruptible.

I have modified my own vectors.s by inserting the following immediately 
before the call to interrupt_end():
 // Enable interrupts
 mrs r4,cpsr
 bic r4,r4,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
 msr cpsr,r4

This seems to work for me, but I would appreciate feedback if this is a 
sane and wise thing to do.

As a newbie, how do I submit such modifications for inclusion in the 
repository?

Thanks,
Mike


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