[ECOS] Re: DSR Scheduling Problem
Grant Edwards
grante@visi.com
Mon Jan 16 15:13:00 GMT 2006
>>> If the transmitter has a hardware FIFO, and the software
>>> transmits one byte per interrupt,
>>
>> Then the sofware is completely and utterly broken. It doesn't
>> deserve to work.
>>
>>> then presenting a block of data to it after an idle period
>>> will invoke the ISR/DSR a slew of times until the FIFO is
>>> full.
>>
>> That's insane. Nobody with a clue would write software like
>> that.
>
> Actually, the generic 16x5x serial driver in eCos works
> exactly like that.
You're kidding!
>> When you get a TX interrupt you write data to the tx FIFO until it's
>> full.
>
> Yep. I've made a somewhat quick-and-dirty fix that is attached below.
That should provide a drastic reduction in load for that driver.
--
Grant Edwards grante Yow! FIRST, I'm covering
at you with OLIVE OIL and
visi.com PRUNE WHIP!!
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