[ECOS] ISR problem
Bart Veer
bartv@ecoscentric.com
Mon Jan 2 21:46:00 GMT 2006
>>>>> "Ram" == ram kumar <ram_ecos@yahoo.co.in> writes:
Ram> I checked the serial driver 'ser0'. That is working well. I
Ram> used cyg_io_read & write for testing.
Ram> I found that ISR & DSR of 'ser0' are taken from 'generic
Ram> 16x5x' for x86 PC. But I want my own implementation in DSR. I
Ram> am having a global buffer in which I have to save the
Ram> received data. I am giving the implementation code of my own
Ram> ISR & DSR. Please suggest me, what I did wrong in my code.
<snip>
Ram> // I tried with vector = 12 & 32 & 38
I am not sure where you got those numbers from.
The interrupt vector numbers for any target are defined, directly or
indirectly, in the header <cyg/hal/hal_intr.h>. On a PC target that
chains to var_intr.h -> plf_intr.h -> pcmb_intr.h, which contains the
following:
#define CYGNUM_HAL_INTERRUPT_COM2 35
#define CYGNUM_HAL_INTERRUPT_COM1 36
Bart
--
Bart Veer eCos Configuration Architect
http://www.ecoscentric.com/ The eCos and RedBoot experts
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