[ECOS] scheduler locking in Cyg_WallClock class

[Daniel Helgason]

I have a question about cyg_drv_dsr_lock() in
Cyg_WallClock::get_current_time in wallclock.cxx.

The comments in wallclock.cxx say the calls to the hardware drivers can take
a lot of time. And mine do - my RTC is an i2c device (relatively slow). The
whole scheduler is locked for the entire time it takes to read/write from
it.

Shouldn't the decision to take this drastic of a lock be in the lower-layer
driver?

I'm guessing the scheduler lock is to protect against possible interaction
between Cyg_WallClock::get_current_time and Cyg_WallClock::set_current_time
without having to use a mutex.

+---------------------------------------
|  Daniel Helgason <danielh_AT_telus.net>


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