[ECOS] rattler fcc1 PIO usage qusetion

[Gary Thomas]

On Mon, 2005-03-07 at 20:51 -0700, Bill wrote:
> I am porting eCos to an MPC8247 system and am using the MPC8250 based 
> rattler board as a model in several areas. One of those is the ethernet 
> handler for FCC1.
> 
> I need a little clarification concerning the ethernet bit level access 
> functions in rattler_eth.inl.
> 
> It appears to me that PIO Port-B bit 7 (FCC1_PHY_RESET) is the physical 
> ethernet chip reset line, but bits 2 and 3 of PIO Port-C appear to be 
> used as software only flags to control the operation of the bit level 
> access functions. In other words Port-C bits 2 and 3 have no defined 
> hardware function. Is this analysis correct ?? Also, what is the 
> specific use of the bit level functions ??

These define the platform specifics - how your particular board is
connected between the CPU and the PHY devices.  The Port-C bits
are used to communicate with the PHY (send it commands, get status,
etc)

-- 
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Gary Thomas                 |  Consulting for the
MLB Associates              |    Embedded world
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