[ECOS] rattler fcc1 PIO usage qusetion

Bill wbarber@nsgdata.com
Tue Mar 8 03:51:00 GMT 2005


I am porting eCos to an MPC8247 system and am using the MPC8250 based 
rattler board as a model in several areas. One of those is the ethernet 
handler for FCC1.

I need a little clarification concerning the ethernet bit level access 
functions in rattler_eth.inl.

It appears to me that PIO Port-B bit 7 (FCC1_PHY_RESET) is the physical 
ethernet chip reset line, but bits 2 and 3 of PIO Port-C appear to be 
used as software only flags to control the operation of the bit level 
access functions. In other words Port-C bits 2 and 3 have no defined 
hardware function. Is this analysis correct ?? Also, what is the 
specific use of the bit level functions ??

Thanks in advance, Bill Barber

-- 
Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss



More information about the Ecos-discuss mailing list