[ECOS] Running ECOS on a SPARC with less than 8 register windows

[Michael Cowell]

Hi,

I'm interested in using ECOS on a LEON2 SPARC processor running on an 
FPGA development system. Using the LEON2 port of ECOS I have succeeded 
in running all the tests in the source tree, and they all pass. However, 
if I configure and synthesize my processor with less than 8 register 
windows all of the tests fail. The function in which they fail varies 
depending on the particular test, and sometimes the PC appears to be set 
to garbage (i.e. outside of memory). Clearly the handler for the 
register overrun trap does not expect a system with such a small number 
of registers (am I wrong about this?).

The eventual application for the software is not the FPGA system, but an 
embedded low power device, and the large register file required for 8 
register windows is a significant problem.

Has anyone run ECOS on a SPARC with less than 8 register windows (the 
SPARC architecture specification allows as little as 2)? Or, does anyone 
know what I will have to modify in the HAL code to implement the correct 
behavior in this situation?

Thanks,

Michael Cowell

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