[ECOS] AT91 bad IRQ/FIQ priority handling?

Andrew Lunn andrew@lunn.ch
Tue Sep 14 09:20:00 GMT 2004

On Tue, Sep 14, 2004 at 10:57:34AM +0200, Andrea Michelotti wrote:
> Hi everybody,
> looking at at91_misc.c :
> int hal_IRQ_handler(void)
> I think there is a bug in irq fiq priority when a FIQ and an IRQ are arised
> together.
> In this case IVR reading updates ISR but with the IRQ number not with the
> FIQ one. Then
> the irq is served instead of fiq (changing SMR priority doesn't change order
> always IRQ before FIQ) .
> Is this behavior considered a bug?
> I did several trials with my jtst board a new Atmel board with an ARM7+DSP
> embedded (where the DSP generates almost simulataneous FIQs and IRQs).
> I did a simple patch that solve my problem that is a mix of old and new ecos
> irq handling method.

I know when i last looked, FIQ was not really supported. I have used
the FIQ on an ebsa285 but i did that with my own interrupt handling
code one the FIQ vector using cyg_interrupt_set_vsr().

Probably the best thing to do is clean up you patch and then post it
so we can discuss it.


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