[ECOS] rattler board questions

[Richard.von.Lehe@gd-ais.com]

It turns out that there is a configuration word and it sets the IMM base 
to be FF000000 (factory setting).   I still don't know why my section of 
code below doesn't work.  Still open to suggestions...

Richard.von.Lehe@gd-ais.com wrote:

> Hello,
>
> Basic questions I am unable to find answers to:
>
> 1) How does the IMM base register get set?  I don't see it set 
> anywhere in rattler.S, although writes to internal registers are being 
> made there.  There is obviously an assumption that the internal memory 
> map is at 0xFF000000, but somewhere this has to be set!  This leads me 
> to my second question.
>
> 2) Is there a hardware configuration word in EEPROM that sets the IMM 
> base register?  If so, should I assume it is 0xFF000000? 
> 3) If the above is true, why can't I set internal memory-mapped 
> registers OR4/BR4 and OR5/BR5?
>
> Here's some code that I've been trying to get to work.  Any ideas on 
> why this would segfault on the stw line?    I have inserted this 
> snippet at the end of  hal_hardware_init in rattler.S.  Basically the 
> original body of hal_hardware_init is passed over in my application 
> startup because I am defining CYG_HAL_STARTUP_RAM.  My code gets 
> executed right before the routine returns (blr).
>
>    addis   r30,0,0xFF01   # IMMR base addr = 0xFF000000+10000. We add
>                          # 0x10000 because using relative addressing
>                          # in load and store instructions only allow a
>                          # offset from the base of +/-32767.
>
>        // CS4 - 1MB external <--- CHANGING TO 32K!!
>        lwi     r3,0xFFFF8000
>        stw     r3,CYGARC_REG_IMM_OR4(r30)
>        lwi     r3,0x80001801
>        stw     r3,CYGARC_REG_IMM_BR4(r30)          // CS5 - NVRAM on 
> exp board
> //    lwi     r3,0xFFFF9030
>    lwi     r3,0xFFFF8000
>    stw     r3,CYGARC_REG_IMM_OR5(r30)
>    lwi     r3,0x800F0801           stw     r3,CYGARC_REG_IMM_BR5(r30)
>
>
> Any insight?  Gary Thomas?
>
> Thanks,
> Rich
>


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