[ECOS] About porting eCos on AR2001

superen_cn@163.com superen_cn@163.com
Thu Mar 25 03:12:00 GMT 2004


hi,all
	I am trying to port eCos on "AR2001" platform.I wonder whether or not anybody else is already working on something similar.
	The Architectural Overview of AR2001:
CPU
	R3000 level, MIPS I class 32-bit RISC processor
	32 thirty-two bits general purpose registers
	4KB two-way set-associative instruction cache, 2KB direct mapped data cache.
	Up to 100 MHz CPU bus frequency
	
SDRAM Controller
	Supports two SDRAM banks of either 16 or 32 bit wide data bus
	Supports 16Mb (1Mx16, 2Mx8) , 64Mb (2Mx32, 4Mx16, 8Mx8) and 128Mb
	(4Mx32, 8Mx16) type SDRAM 
	2MB up to 64MB total address space
	Active power down and self refresh power saving modes
    …………

	Among the present hal packages,which is most similar to "AR2001"?
    
    Thanks a lot! 				

        superen_cn
        superen_cn@163.com
          2004-03-25


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