[ECOS] EDB7312(ARM720T) interrupts

Aaron Case aaron.case@dynazign.com
Fri Nov 14 22:22:00 GMT 2003


Andrew,

The interrupt named in the cyg_interrupt_create() call is from the
hal_platform_ints.h file and is an onboard UART to the ARM 720T core of the
EDB7312 microprocessor. To my knowledge all that is needed is to program the
syscon1 register to enable UART1 and to enable interrupts.  I have verified
this is done by the eCos system startup routines with my ICE.

Is there something else that I am missing??

Thanks,
Aaron

-----Original Message-----
From: Andrew Lunn [mailto:andrew@lunn.ch]
Sent: Friday, November 14, 2003 5:13 PM
To: Aaron Case
Cc: Gary Thomas; Ecos-Discuss
Subject: Re: [ECOS] EDB7312(ARM720T) interrupts


On Fri, Nov 14, 2003 at 05:07:29PM -0500, Aaron Case wrote:
> Gary,
>
> Many thanks, that cleared up my understanding of eCos interrupts a great
> deal.  Although, I still cant seem to achieve software connectivity with
the
> eCos interrupt model.
>
> While testing my interrupt code I have observed that I can assert bits in
> the interrupt status register by sending characters to a UART. As well as
> enabling them with cyg_interrupt_unmask() call(see below).
>
> I, however, have not be able to get the ISR(and thus DSR) to execute(via
> break points with my MAJIC ICE).
>
> In the case of the UART1 RX interrupt, I can send a character, verify its
> arrival at the buffer and FIFO, but no ISR or DSR is executed. Im assuming
> the problem is my software configuration(which is REALLY close to the
Massa
> text).  See code below.

I don't see anywhere in your code where you program the serial chip to
actually enable it to generate interrupts. Also, does eCos provide a
serial driver for this chip? If so, that driver may already have the
interrupt.

        Andrew


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