[ECOS] EDB7312(ARM720T) interrupts
Fri Nov 7 22:05:00 GMT 2003
So is the hal_IRQ_handler the function that the OS is vectored to from the
ARM vector table?
I ask because I wrote a similar function(as hal_IRQ_handler()) but, haven't
figured out what is the best way invoke the ISR from the hal_IRQ_handler().
The interrupt comes in, the processor vectors to 0x18(IRQ for ARM720T) which
points to hal_IRQ_handler(), which then returns an integer used to invoke
the appropriate ISR routine for that interrupt.
Is there a eCos facility for translating the output of the IRQ_handler, or
do I use this integer as a index into an array of function pointers(pointing
of course to the ISR's).
My major concern is that I am minimizing interrupt latency with this scheme.
Thanks for the help,
From: Gary Thomas [mailto:firstname.lastname@example.org]
Sent: Friday, November 07, 2003 4:14 PM
To: Aaron Case
Subject: Re: [ECOS] EDB7312(ARM720T) interrupts
On Fri, 2003-11-07 at 14:01, Aaron Case wrote:
> I have a question about implementing interrupts with the rich eCos
> API with the limited ARM interrupt vector table.
> >From my experience, and as mentioned in the Massa test, the ARM
> has only two vectors for interrupts(FIQ and IRQ) and the eCos API is
> implemented more readily for architectures that have multiple entries in
> their vector tables.
> It is therefore up to the software to look at the INTSR1/2/3 registers to
> determine the source of the interrupt.
> So when I create my 23 different interrupts, where is the most advisable
> place to decode the source of the interrupt. Ive considered having all the
> IRQ's share an ISR and each have a unique DSR identifiable through the
> argument of the cyg_interrupt_create() call.
> Having all the interrupts share an ISR to decode the interrupt source
> to be more processing than the ISR was intended to handle.
> If the aforementioned approach is not in vogue(or feasible), than could
> someone out there who has done this before and would be able to point me
> a post or document that describes how to approach this implementation
On the ARM architecture, we assume that your HAL has a function
"hal_IRQ_handler()" which will interrogate your hardware and return
a unique value (typically 1..N) indicating which of those interrupts
has just occurred. Then there can be a potentially different ISR
for each interrupt.
Look at some of the ARM HALs to see how this is done.
Gary Thomas <email@example.com>
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