[ECOS] EDB7312(ARM720T) interrupts

Aaron Case aaron.case@dynazign.com
Fri Nov 7 21:01:00 GMT 2003


I have a question about implementing interrupts with the rich eCos interrupt
API with the limited ARM interrupt vector table.

>From my experience, and as mentioned in the Massa test, the ARM architecture
has only two vectors for interrupts(FIQ and IRQ) and the eCos API is
implemented more readily for architectures that have multiple entries in
their vector tables.

It is therefore up to the software to look at the INTSR1/2/3 registers to
determine the source of the interrupt.

So when I create my 23 different interrupts, where is the most advisable
place to decode the source of the interrupt. Ive considered having all the
IRQ's share an ISR and each have a unique DSR identifiable through the data
argument of the cyg_interrupt_create() call.

Having all the interrupts share an ISR to decode the interrupt source SEEMS
to be more processing than the ISR was intended to handle.

If the aforementioned approach is not in vogue(or feasible), than could
someone out there who has done this before and would be able to point me to
a post or document that describes how to approach this implementation best.

Thanks in advance,
Aaron Case

Aaron Case
Dynazign, Inc.
Charlotte, NC

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