[ECOS] Memory Layout of Samsung SNDS.....??

Andrew Lunn andrew@lunn.ch
Tue Nov 4 08:30:00 GMT 2003


On Tue, Nov 04, 2003 at 10:14:52AM +0800, RandyLin@mxic.com.tw wrote:
> I am working on customize board which base on Samsung SNDS.
> I try to port redboot on target, but I have some questions.....
> 1.
> In mlt_arm_snds_rom.ldi
> MEMORY
> {
>     ram : ORIGIN = 0, LENGTH = 0x1000000
>     rom : ORIGIN = 0x1800000, LENGTH = 0x80000
> }
> I am confused, why rom locate at 0x1800000? not 0x0?
> after arm reset, it run code from 0x0, right?

At boot time the ROM will be at 0x0 so that the reset vector is in the
ROM. But once the image is running, the ROM will be remapped to a
higher address and RAM mapped down to 0x0. You need to do this so that
you can change the vectors.

> 2.
> I assume the mlt_arm_snds_rom.ldi is not correct, so I modify:

Bad assumption.... A good way to work with eCos is assume its
correct. When it appears wrong, still assume its correct and try to
work out why it correct. Generally you are missing something which is
why you think its wrong..... 

> MEMORY
> {
>     ram : ORIGIN = 0x2000000, LENGTH = 0x1000000
>     rom : ORIGIN = 0, LENGTH = 0x80000
> }
> SECTIONS
> {
>     SECTIONS_BEGIN
>     SECTION_rom_vectors (rom, 0, LMA_EQ_VMA)
>     SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA)
>     SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA)
>     SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
>     SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA)
>     SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
>     SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA)
>     SECTION_fixed_vectors (ram, 0x2000020, LMA_EQ_VMA)
>     SECTION_data (ram, 0x2020000, FOLLOWING (.gcc_except_table))
>     SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
>     CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
>     SECTIONS_END
> }
> also modify mlt_arm_snds_rom.h, hal_platform_setup.h
> I burn into flash and see the LED lights,
> but program hang on set_debug_comm(CYGNUM_CALL_IF_SET_COMM_ID_EMPTY);
> any suggestion?

Undo what you have done!

     Andrew

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