[ECOS] ARM - RAM region at other address than 0

Gary D. Thomas gary.thomas@mind.be
Tue May 20 13:02:00 GMT 2003


On Tue, 2003-05-20 at 00:47, Backhaus Willy wrote:
> hello,
> 
> > On Mon, 2003-05-19 at 14:33, Grant Edwards wrote:
> > > On Mon, May 19, 2003 at 04:11:38PM -0400, Doyle, Patrick wrote:
> > >
> > > > I glanced at the '5471 data manual and I don't see the
> > > > "mechanism for swapping ROM and SDRAM at address 0" that I was
> > > > expecting to see... Hmmm.... Perhaps you should ask TI about
> > > > this.  eCos really likes to see interrupt vectors in RAM.
> > >
> > > At one point I had a hacked version of vectors.S that worked
> > > with ROM at 0.  It did the "double vector" thing (not very
> > > pretty).  After tiring of the requirement to maintain my own
> > > vectors.S, I finally swapped ROM/RAM -- life is easier that
> > > way.
> > >
> > > If the 5471 doesn't have some sort of software-controlled
> > > chip-select logic, then when you lay out your board you should
> > > add a couple gates to allow two of the chip selects to be
> > > swapped.
> 
> we will use a SDRAM as RAM. swapping chip selects works when you have a SRAM
> and Flash. I don't think it would work with SDRAM because the processors
> won't generate the SDRAM specific control signals when it expects to
> read/write an asynchronous memory.
> 
> > However, if anyone wants to experiment
> > with Grant's approach (from *long* ago), I still have the patches
> > that he sent me for this :-)
> 
> yeah, I want it.

It turns out that all I have is Grant's "vectors.S" code which supports
this.  I've placed it at http://www.mlbassoc.com/ARM-vectors.S

Since I don't know much about it, please refer any specifics to Grant.
Of course, he'll have to remove three years of dust from his memories,
so be patient if it takes some effort to make use of this approach.

-- 
Gary D. Thomas <gary.thomas@mind.be>


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