[ECOS] -- please someone respond -- S3c2410x (ARM920T) HAL port

[Michael Anburaj]

OOPS! I was wrong. The "hal-porting-platform.html" document clearly says 
interrupts are not needed in redboot.

So, I am back to my initial problem. I have this simple issue, which anyone 
familiar with Redboot should know the answer.

1.	After a continue command is issued in the gdb console, $C0a#d4 is sent by 
the GDB host protocol <at least this is true in my case & most others>. The 
GDB stub inside Redboot interprets this & should eventual jump or switch to 
the application thatÂ’s being started. It will be great if you could point me 
to a document about this mechanism. Or at least if you could tell me which 
code (end code) is responsible for this; then I can back track the path & 
figure out the faulty code.

Cheers,
-Mike.


>From: "Michael Anburaj" <embeddedeng@hotmail.com>
>To: embeddedeng@hotmail.com, ecos-discuss@sources.redhat.com
>Subject: Re: [ECOS] -- please someone respond -- S3c2410x (ARM920T) HAL 
>port
>Date: Fri, 20 Jun 2003 04:28:07 +0000
>
>No one responded to my previous emails. One way it's good; I getting to 
>know ecos/Reboot underlying code much more elaborately.
>
>The problem I was seeing may be attributed to this (not very sure):
>The timer (RTC or tick) interrupt is not happening at all.
>
>Questions:
>1.	Is this (ISR) needed for proper operation of Redboot (for example for 
>dispatching the gdb command like, “continue”)?
>2.	The reason why the interrupt were not happening was, the I bit in CPSR 
>never got cleared (IRQs enabled). The document 
>“hal-exception-handling.html” in its very 1st point says about interrupts 
>being disabled before starting anything. But never mentioned when its 
>supposed to be turned ON. Someone familiar with the ARM ports; can you tell 
>me where exactly the I bit in CPSR is cleared; this will defiantly make my 
>job easier.
>
>Thanks & Cheers,
>-Mike.
>
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