[ECOS] ARM vector.s -- suspicious code in return_from_exception

[Mark Salter]

>>>>> Eric de Jong writes:

> Thanks for the patch mark.
> Now how about the following case:
> timer interrupt occurs, return_from_exception is called, spsr is written, ....
> and another interrupt occures. 

Hmm, after staring at this for a while, I think you have found
another problem. IRQs are disabled (or should be) at the time
return_from_exception is run. FIQs, however, are possible. That
is a bug I think. At least its a bug as long as the HAL treats
FIQ and IRQ equally as is the current case.

We probably haven't been bitten by this because I don't think we
have any boards that make much use of FIQ.

> As I understand interrupts are enabled during
> task switches (but I still never found out where :-) ) and at least the fiq can
> interrupt the code. This will mess-up the spsr in supervisor mode. This makes it
> more important not to use spsr when interrupts are enabled.

Tasks are created with interrupts enabled (see HAL_THREAD_INIT_CONTEXT).
When task switches occur (HAL_THREAD_SWITCH_CONTEXT), the task being
switched in inherits the same interrupt enable/disable state as it had
when it was switched out. None of this has anything to do with the
exception/interrupt handling in vectors.S.

Anyway, I think this patch fixes the problem you note above. I'll defer
checking it in to give others a chance to comment.

Index: hal/arm/arch/current/src/vectors.S
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/arch/current/src/vectors.S,v
retrieving revision 1.52
diff -u -p -5 -r1.52 vectors.S
--- hal/arm/arch/current/src/vectors.S	30 Jun 2003 12:16:16 -0000	1.52
+++ hal/arm/arch/current/src/vectors.S	2 Jul 2003 13:43:17 -0000
@@ -560,11 +560,11 @@ call_exception_handler:
         // [r3+4] : exception r1
         // [r3]   : exception r0
         
         mrs     r4,cpsr                 // switch to Supervisor Mode
         bic     r4,r4,#CPSR_MODE_BITS
-        orr     r4,r4,#CPSR_SUPERVISOR_MODE
+        orr     r4,r4,#CPSR_SUPERVISOR_MODE|CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
         msr     cpsr,r4
 
         mov     r5,sp                   // save original svc sp
         mov	r4,lr                   // and original svc lr
 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
@@ -767,11 +767,11 @@ IRQ:
 	
 handle_IRQ_or_FIQ:
 
         mrs     r4,cpsr                 // switch to Supervisor Mode
         bic     r4,r4,#CPSR_MODE_BITS
-        orr     r4,r4,#CPSR_SUPERVISOR_MODE
+        orr     r4,r4,#CPSR_SUPERVISOR_MODE|CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
         msr     cpsr,r4
 
         mov     r5,sp                   // save original svc sp
 	mov	r4,lr			// save original svc lr
         stmfd   sp!,{r0-r2,r4,r5}       // push svc_sp, svc_lr, vector, psr, pc


--Mark

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