[ECOS] Re: On ecos interrupt process

Nick Garnett nickg@ecoscentric.com
Mon Sep 23 08:31:00 GMT 2002


张 亮 <johnsonest@hotmail.com> writes:

Please remember to copy all messages to the ecos-discuss list.

> Dear nickg,
>    thank you for your detailed explaination!
>    could you tell me that:
>    1) acknowledge interrupt(2) is a must?

Yes. Whether it actually does anything is dependent on the design of
the interrupt controller. 

>    2) who? user's ISR or OS will call acknowledge interrupt(2)?

It is the job of the user ISR to do this. It should usually do this as
soon as it has cancelled the interrupt source in the device.

>    3)if IRQ1(higher) is processing,after acknowledge
> interrupt(2)lower interrupt will be process if any,right? so if
> [enable interrupts](1)was called, lower interrup will post DSR
> before higher interrupt.of course,it is accepted.
>

This depends on the design of the interrupt controller and the CPU
architecture. If the architecture implements an IPL mechanism then
lower priority interrupts will be pended until higher priority
interrupts return. If there is no IPL then acknowledging a higher
priority interrupt may allow lower priority interrupt in. It is the
responsibility of the ISR to acknowledge at a point where this would
be safe.

DSRs are not prioritized and it is no specified what order they are
executed in. The default is currently LIFO order.


-- 
Nick Garnett - eCos Kernel Architect
http://www.eCosCentric.com/


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