[ECOS] Question about fixed vector table(ARM).
Thu May 16 05:18:00 GMT 2002
From: Mark Salter [mailto:firstname.lastname@example.org]
Sent: 16 May 2002 12:59
Subject: Re: [ECOS] Question about fixed vector table(ARM).
Thank you for your reply.
why can't we just use(for example for IRQ):
0x18 ldr pc, .IRQ ; Can this jump to anywhere in the address
0x50(label) IRQ: ; process the IRQ vector here.
by the above : ext IRQ occurs --> load the instruction from 0x18 (ldr pc, .
IRQ) --> jump the IRQ label
while have fixed vector table: reset occurs --> jump to fixed vector table
0x38 (what will be in here? Is it the address to label IRQ?) --> jump to IRQ
label address --> process IRQ
Thanks a lot!
>>>>> HuangQiang writes:
> Thank you very much. I still have one question about the fixed vector
> In ARM vectors.s file takes care of the vector table(from 0x00) setup and
> fixed vector table(from 0x20) setup. While branch to the vector it first
> branch to the vector table(from 0x00) and then directed to fixed vector
> table(from 0x20) then to the actual services routine. Why this fixed
> table is needed here? Can't we just setup the vector table (from 0x00) and
> branch to the services routine indirection of fixed vector table?
A branch instruction has only a 24-bit range, so you would not
have access to the full address range if you used a branch in
the CPU vector table. We use the table at 0x20 to hold full 32-bit
addresses of the service routines. The instructions in the CPU
vector table simply load those 32-bit values to the PC register.
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