[ECOS] Question about ARM memmap for new port

[Kjell Svensson]

Hi Jim,

The Atmel AT91 EB40 is an ARM7TDMI based device which sounds pretty
close to Your ongoing design. The EB40 implementation can be found in
the CVS, and I'd suggest You take a look at this code to se if it could
be useful as a template for Your port.

The Atmel AT91 family does not have an MMU, but typically anyway
implements the "swapping" of ROM/RAM areas at startup by a feature
called the "remap".

The reason why this is done like this in most ARM implementations is
that an ARM is hardcoded to always start executing code after reset at
address 0. Following the reset exception vector, the other exception
vectors (typically the interrupt handling) are placed up to address
0x1c. Hence, there must be something redable as code at address 0x0
present after reset, typically a flash or a ROM.

However, such memories are typically slower than fast 0-waitstate SRAMs.
To be able to obtain the fastest exception handling responses, most ARM
chips therefore provides a possibility to "exchange" the slow ROM:ed
vectors with faster RAM:ed vectors (after they have been properly
initiated after start-up). It should not be necessary to perform the
swapping in most ARMs, but You should pay attention so that You do not
introduce unwanted latency due to low interrupt vector memory bandwidth.

Good luck!
/Kjell
-- 
Kjell Svensson                 Embedded Technology Manager
Techtribe Solutions AB         Tel:  +46 (0)31 706 06 00
Flöjelbergsgatan 12            GSM:  +46 (0)70 270 76 66
SE-431 37  MÖLNDAL             Mail: kjell@techtribe.se
Sweden




jyl087@netscape.net wrote:
 > I'm thinking about porting eCos to a custom board built around
 > an very simple ARM processor. Specifically, it has no MMU and
 > no D/I caches.
 >
 > Most of the HALs that I've seen for ARM assume that the ROM is
 > at physical address 0x0 and RAM is higher up. When the ROM starts,
 > it "flips" the address space around, most likely with an MMU. I.e.,
 > RAM gets mapped to 0x0 and ROM goes up high.
 >
 > My question is this...  Is this strictly necessary?  If not,
 > what do the "mlt_arm_foo_rom/ram.mlt" files look like?  I studied
 > most of the files in the eCos 2.0 tree, and i think the IQ80310
 > might be a candidate to use as a template?
 >
 > Where can I find documentation on the ".ldi" file syntax? I'm not
 > sure I understand the contents. For example what d "AT(...)" or
 > "FOLLOWING(...)" or "LMA_EQ_VMA" mean?
 >
 > Finally, is the anything else I should consider given the nature
 > of the chip that I'm trying to use?
 >
 > Thanks in advance for the list's help...
 >
 > /Jim
 >
 >
 > __________________________________________________________________
 > Your favorite stores, helpful shopping tools and great gift ideas. 
Experience the convenience of buying online with Shop@Netscape! 
http://shopnow.netscape.com/
 >
 > Get your own FREE, personal Netscape Mail account today at 
http://webmail.netscape.com/
 >
 >






-- 
Before posting, please read the FAQ: http://sources.redhat.com/fom/ecos
and search the list archive: http://sources.redhat.com/ml/ecos-discuss