[ECOS] accurate ms delay

[Jani Monoses]

On 4 Apr 2002, Jesper Skov wrote:
> No, they cannot be: with interrupts enabled there can be no guarantee
> that (a) the (timing of the) flash programming protocol is followed by
> the driver and (b) there's no ISR that tries to accesses the flash
> during the erase/programming of the flash.
>
> That's why the eCos flash drivers run from RAM and disable both cache
> and interrupts.

so for flash drivers for cycles are the way to wait...
thanks
Jani


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