[ECOS] re: Interrupt vectors for FIQ

wu shaojie w_shaojie@hotmail.com
Thu Nov 1 03:43:00 GMT 2001


Hi Gary,

Thanks again for your reply, as you recommended , I modified the 
<cyg/hal/hal_platform_ints.h> file as  following:


> > //####DESCRIPTIONEND####
> > //
> > 
>//==========================================================================
> > #define CYGNUM_HAL_INTERRUPT_FIQ               1 /* add this line*/
> > #define CYGNUM_HAL_INTERRUPT_USART0            2
> > #define CYGNUM_HAL_INTERRUPT_USART1            3
> > #define CYGNUM_HAL_INTERRUPT_TIMER0            4
> > #define CYGNUM_HAL_INTERRUPT_TIMER1            5
> > #define CYGNUM_HAL_INTERRUPT_TIMER2            6
> > #define CYGNUM_HAL_INTERRUPT_WATCHDOG          7
> > #define CYGNUM_HAL_INTERRUPT_PIO               8
> > #define CYGNUM_HAL_INTERRUPT_EXT0              16
> > #define CYGNUM_HAL_INTERRUPT_EXT1              17
> > #define CYGNUM_HAL_INTERRUPT_EXT2              18
> >
> > #define CYGNUM_HAL_ISR_MIN                     1 /* changed the value*/
> > #define CYGNUM_HAL_ISR_MAX                     18
> > // Note: extra slots (0,1) to avoid messing with vector translation
> > #define CYGNUM_HAL_ISR_COUNT                   (CYGNUM_HAL_ISR_MAX + 1)
> > 
>-----------------------------------------------------------------------------------


and I will use the following function to create the FIQ interrupt

cyg_interrupt_create( CYGNUM_HAL_INTERRUPT_FIQ, 0,0,&FIQ_0_Handler,
                      NULL,&FIQ_0_ISR, &intr); /* no DSR  here */

Does it sound correctly to you? If it does, I will have a try and
let you know the result. Thanks a lot.

Shaojie




>From: Gary Thomas <gthomas@redhat.com>
>To: wu shaojie <w_shaojie@hotmail.com>
>CC: eCos Discussion <ecos-discuss@sources.redhat.com>
>Subject: re: Interrupt vectors for FIQ
>Date: 12 Nov 2001 09:13:57 +0900
>
>Note: messages without a subject (as the original of this one) are most
>often simply deleted, rather than read.
>
>On Sun, 2001-11-11 at 17:31, wu shaojie wrote:
> > Hi Gary,
> >
> >
> > Thanks for your reply, I know Interrupt numbers  correspond to interrupt
> > sources on the platform.
> > I am using AT91 chip, it is exactly the same CPU used on EB40 board. For 
>the
> > chip used on eb40,
> > it supports 12 interrupt sources and they are: FIQ, SWIRQ,
> > US0IRQ,US1IRQ,TC0IRQ,TC1IRQ,TC2IRQ,WDIRQ,
> > PIOIRQ,IRQ0, IRQ1 and IRQ2.
> >
> > I know  in general, whether a device asserts IRQ or FIQ depends on the
> > hardware. I know on our board,
> > the FIQ is mapped for an interrupt from the peripheral, but I searched 
>the
> > <cyg/hal/hal_platform_ints.h>
> > (the library I built for eb40) and could not find the number for FIQ, 
>below
> > I pasted part of that
> > file:
> >
> > 
>--------------------------------------------------------------------------------------------------------
> >
> > //####DESCRIPTIONEND####
> > //
> > 
>//==========================================================================
> >
> > #define CYGNUM_HAL_INTERRUPT_USART0            2
> > #define CYGNUM_HAL_INTERRUPT_USART1            3
> > #define CYGNUM_HAL_INTERRUPT_TIMER0            4
> > #define CYGNUM_HAL_INTERRUPT_TIMER1            5
> > #define CYGNUM_HAL_INTERRUPT_TIMER2            6
> > #define CYGNUM_HAL_INTERRUPT_WATCHDOG          7
> > #define CYGNUM_HAL_INTERRUPT_PIO               8
> > #define CYGNUM_HAL_INTERRUPT_EXT0              16
> > #define CYGNUM_HAL_INTERRUPT_EXT1              17
> > #define CYGNUM_HAL_INTERRUPT_EXT2              18
> >
> > #define CYGNUM_HAL_ISR_MIN                     2
> > #define CYGNUM_HAL_ISR_MAX                     18
> > // Note: extra slots (0,1) to avoid messing with vector translation
> > #define CYGNUM_HAL_ISR_COUNT                   (CYGNUM_HAL_ISR_MAX + 1)
> > 
>-----------------------------------------------------------------------------------
> >
> >
> >
> > you can find, except the FIQ and SWIRQ, all other interrupts has been
> > defined in the above
> > file. Now I was wondering  whther the eCos HAL could handle the FIQ? if 
>it
> > could,
> > then which number I should tell eCos to use?  Actually, on our board, 
>the
> > interrupt connected
> > with FIQ pin of arm chip does  not need "absolute" fastest response, I 
>just
> > want
> > to know whether eCOS HAL has defined the FIQ and how can I use eCOs  to
> > handle it( assuming
> > I want  eCos handle FIQ based interrupts just like any other interrupt
> > source).
> > Thanks so much.
>
>Looking at the sources, I _believe_ that the FIQ will show up as
>interrupt #1.  You'd have to add this (and adjust ISR_MIN) to the
>include file you cite.
>
>Note: I've not tested this on the AT91 hardware, nor can I at the
>moment.  If you want to try it, let us know, but if it doesn't work,
>I'm afraid you're on your own.
>
> >
> > Shaojie
> >
> >
> >
> >
> >
> >
> >
> > On Sun, 2001-11-11 at 04:55, Shaojie Wu wrote:
> > >
> > >
> > >I am using the IFQ to check an interrupt signal froma hardware: if CPU
> > >received the interrupt, the access to the memory enbedded on that 
>hardware
> > >must be stopped. I check the HAL for AT91 and could not find the vector 
>for
> > >FIQ but after I searched the discussion board, it seems eCos could 
>handle
> > >FIQ as an IRQ . SO my question to Ecos is : which interrupt I could use 
>to
> > >create
> > >the ISR and DSR? Thanks in advance
> > >
> >
> > Sorry, but there is no [one, single] answer to this question.
> >
> > Interrupt numbers (the ones you've quoted) correspond to interrupt
> > sources on your platform.  In most cases, the actual numbers are
> > dictated by the hardware platform design.  For example, the eCos
> > interrupt number for the timer interrupt might be 3 on one ARM platform
> > but 17 on another.  Also, in general, whether a device asserts IRQ or
> > FIQ depends on the hardware.  Once you know the mapping, all you need
> > to tell eCos is the number.
> >
> > In order to determine the "number" (IRQ vs FIQ does not matter here),
> > you'll have to look at the hardware platform specifics.  If this is a
> > platform that we've ported (one of the standard platforms supported by
> > Red Hat), the numbers will be listed a file, typically
> >   <cyg/hal/hal_platform_ints.h>
> > although that can vary.  If it's a port from somewhere else, you'll
> > have to find the information elsewhere (in the documentation, e.g.),
> > but the number should be in the .h file.
> >
> > One word of caution: although eCos _can_ handle FIQ based interrupts
> > just like any other interrupt source, it often does not make sense to
> > do so.  FIQ interrupts are designed for absolute fastest response (hence
> > 'FIQ' == 'Fast Interrupt reQuest').  Using the standard eCos ISR/DSR
> > scheme would probably defeat the point of using FIQ in the first place.
> >
> >
> >
> > _________________________________________________________________
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>


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