[ECOS] MPC860, instruction cache & ethernet

Ross Wightman rwightma@sfu.ca
Fri Dec 8 16:54:00 GMT 2000

Currently my project group and I have eCos up an running on a MPC860T board.
This board uses the builtin FEC of of the 860T. We have written an ethernet
driver for the FEC that we based off of the driver for the MBX.
Unfortunately it looks like we are having some speed problems. The ethernet
driver works (a little), it can send out some packets, and receive some, but
it doesn't seem to be able to keep up with the incoming packets very long as
the buffers fill up and the network layer dies.  Since we our bsp is based
of the MBX code, both of the caches are off by default so our board is
running slower than it should be. I have tried enabling the caches in the
assembly startup but the network driver won't work at all when either of the
caches are enabled. This is unfortunate because enabling these, especially
the i-cache, improves the timings (tm_basic test) by a large margin. 

FYI: We are running our application code through GDB out of RAM (fairly fast
SDRAM). The GDB stub is in ROM.

Now, for some questions: 

Is the startup code the correct location to turn on the caches or should I
use the HAL_XCACHE_ENABLE macros somewhere else?

Why would should our ethernet driver fail with the i-cache enabled? (I can
understand the reasons for d-cache)

Should it be possible for a 10/100 ethernet driver to operate within the
eCos OS on an MPC860 running at 40mhZ without cache enabled?

Any suggestions would be very much appreciated. If the code for our ethernet
driver is needed to help, I'd be more than happy to post it, although it is
rather messy at the moment :)


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