[ANNOUNCEMENT] Updated: cpuid 20220224
Cygwin cpuid Maintainer
Sun Feb 27 08:20:46 GMT 2022
The following package has been upgraded in the Cygwin distribution:
* cpuid 20220224
The program displays detailed information about the CPU(s) gathered from
the CPUID instruction, and also determines the exact model of CPU(s).
Whereas /proc/cpuinfo is like an abstract of the features important to
Linux in a system, cpuid is a standalone utility which writes a paper
expounding on every feature in each CPU's architecture and what it can
do, at about the one line per bit level.
It is updated and released frequently to stay current with Intel and
AMD information and supports other vendors' chips.
See the project home page for more information:
For information about changes since the previous Cygwin release,
see below or /usr/share/doc/cpuid/ChangeLog after installation.
* Added (synth) and (uarch synth) decoding for AMD Rembrandt E1.
* Added hypervisor+4/eax (Xen) expanded destination id bit.
* Removed bogus 7/1/eax bit 24 "AMX tile support", but the actual bit is
* Renamed 6/eax bit to 23 to mention Thread Director.
* Widened 6/ecx number of enh hardware feedback classes from bits 8-11
to bits 8-15.
* Renamed 7/1/eax bit to 10 to include "fast".
* Added 7/1/ebx decoding.
* Added 0x14/0/ebx decoding for support for IA32_RTIT_CTL EventEn &
* Added synth decoding for (0,6),(11,15) Alder Lake, based on
* Confirmed synth decoding for (0,6),(10,8) Rocket Lake.
* Added (synth) steppings based on instlatx64 samples:
1,(0,5),(0,3),2 P24T C0, (0,6),(0,2),2 K75/Pluto/Orion A2,
(0,6),(4,6),1 Crystal Well C1, (0,6),(7,14),5 Ice Lake-U/Y D1,
(0,6),(9,7),2 Alder Lake-S C0, (0,6),(10,7),1 Rocket Lake B0.
* Corrected missing Core name for (0,6),(9,7) Alder Lake-S A0 stepping.
* In 0x18 leaves, line up values better.
More information about the Cygwin