HELP! How to add secrel psuedo op for pe-i386?

[Nick Clifton]

Hi Brian,

> > So, all I need to do is define ASM_OUTPUT_DWARF_OFFSET correctly in
> > gcc/config/i386/cygwin.h.
> >
> > Does anyone have a good way to define a section relative offset in
> > assembly for Cygwin, or do I need to define labels for the sections in the
> > link script and use them?  That seems messy.
> >
> I think the "correct" way to handle this is to implement the secrel psuedo
> op like IA64 does.  I only have a very vauge idea what this means.
> 
> Can a binutils guru enlighten me on what's involved here?  Thanks.

I'll try.  Basically you change gcc so that instead of generating:

        .word <value>

it generates something like this:

        .word <value> @secrel (<label>)

for a DWARF2 section-relative relocation.  The exact syntax you choose
is up to you, and presumably you would choose something that fits in
with current x86 assembler syntax.

Then you extend the x86 backend in GAS (file: gas/config/tc-i386.c) so
that it can parse the new syntax and generate a relocation for the
value.  In fact you will probably need a set of relocations to handle
different sized values (ie 8-bit, 16-bit, 32-bit and 64-bit).

GAS actually creates relocations by a two stage process.  First it
creates a 'fixup' which is a structure describing an area of the
to-be-output binary that will need extra processing once it has
finished its pass of the input source file(s).  Then it processes
these fixups, creating relocations if necessary.

To add new x86 relocation numbers you will need to modify
include/elf/i386.h and bfd/reloc.c.  (After which you will need to run
"make headers" in the bfd build directory to recreate the other header
files).  You will then need to extend the bfd/elf32-i386.c source file
to handle your new relocations.

Of course there is no real documentation on how to do any of this, so
the source code is still the best guide.  As you have found the IA64
port has done this already, so you can use that as your guide.

Finally you should create an assembler test case to make sure that the
assembler and disassembler can handle these new pseudo ops and
relocations.

Cheers
        Nick


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