armv5b and xscale
Sat Mar 4 10:24:00 GMT 2006
--- Dan Kegel <email@example.com> wrote:
> On 3/3/06, Sean Kelley <firstname.lastname@example.org> wrote:
> > What is the difference between armv5b and xscale?
> I'm not at all up on arm/xscale stuff -- probably those
> .dat files were contributed by other folks, and
> are a bit arbitrary.
> - Dan
The XScale is an evolution of the StrongARM, while the SA used the ARMv4
architecture, the XScale uses ARMv5TE (minus the FP coprocessor). There are
many ARM variants based on ARMv5. The XScale2/iWMMXt is also ARMv5TE but has
additional coprocessor cores for FP and SIMD instructions. The ARMv5b target
really shouldn't be using cpu=xscale but I suspect it works in most cases. The
XScale uses a Harvard cache archecture and has a 32k/32k split instruction/data
L1 cache unlike most other ARMv5 based cores such as the ARM9. Since this
results in different behaviour, optimizations for XScale will not be as
optimal for other ARMv5 cores. GCC has optimizations for various ARMv5
There is plenty of information online at Wikipedia for example.
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