ldrb vs ldrh in gcc-3.4.4 (ARM)

[Richard Earnshaw]

On Fri, 2005-08-19 at 09:45, Marius Groeger wrote:
> On Wed, 17 Aug 2005, Steven Scholz wrote:
> 
> > I noticed that gcc-3.4.4 for ARM is using byte wise loading instructions 
> > although word wise would be much better. Does anyone know why? gcc-3.3.3 is
> 
> Besides the efficiency argument this can get you into _serious_ 
> trouble if you need to access hardware, for example a flash chip, with 
> a certain data width. I always hated that GCC couldn't be bothered to 
> tell when it breaks up a "volatile unsigned long *" into smaller 
> units. Regardless of C's weak types, I believe breaking a "volatile" 
> is a serious offense on GCC's part. Or did I miss some fancy warning 
> option?

Now I think you are spreading FUD.

GCC on ARM has never split 'volatile unsigned long'; it will only split
long types if you used 'packed' in structures, and then that's caveat
emptor.

As to splitting half-words (eg unsigned short) then you have to consider
the architecture involved.  Please read back through earlier postings in
this thread where the history of half-word operations on ARM and how GCC
deals with this has already been explained.

R.

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