ARM and interrupts

[Thierry Moreau]

Toralf Lund wrote:

> I'm wondering about how to set up the interrupt vectors correctly on an
> ARM-9 setup w/o debug monitors. Has anyone else done this? Is there any
> kind of support for it in newlib? I mean, is the code that needs to be
> loaded at address 0 included anywhere? (That would not be the normal
> _start code, as far as I can tell.)

Ah! When a developer says "my project is so small, no need for an O/S", he
removes everything from kernels (e.g. no inter-process messages), libraries
(e.g. no file i/o), and tools (e.g. no ) ... so far, so good.

Then, remains a bare CPU, and an application software design, and
hardware-triggered events. A neat and simple execution environment. Yes, the
developer can do the processor initialization that ocsurs before the main()
instruction ... and the system flash programming tools (that were needed
anyway).

The fun actually starts when the developer needs interrupt dispatching ... the
developer actually needs to re-invent (piecewise and painfully) what was removed

in the first place. Among those pieces, there is some science that goes beyond
the mere technicalities of processor initialization and flash programming.

I'm suggesting that you should consider kernels in the "deeply embedded" kernel
category (or "hard real-time", not because you need hard real-time but because
those kernels are perhaps features-lean). E.g. the ABCD Proto-Kernel(tm) (
http://www.connotech.com/abcd_proto_kernel/abcd_proto_kernel_intro.htm ), but it

is defnitely not the only one.

Cheers

--

- Thierry Moreau

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====
5.     Basic ABCD Concepts

5.1     ‘A’ - Interrupt Dispatching

A basic function of any operating system or kernel is to handle the
microprocessor interrupts. This is usually closely tied to the microprocessor
architecture. The ABCD Proto-Kernel™ provides a unified handling of interrupts
that logically dispatch the interrupt signals to the interrupt service routine
(ISR) that correspond to the exact source of the interrupt, as if the
microprocessor had a large number of independent interrupt vectors. In doing so,

the ABCD Proto-Kernel™ prepares the ISR execution context (some limitations
apply to the software statements that make up the ISR). Lastly, the interrupt
handling includes ISR epilogue facilities that restore a normal software task
context once the ISR processing is complete.

It is the application developers' responsibility to code the interrupt services
routines required by the application, to register them with the ABCD
Proto-Kernel™ interrupt dispatching, and to request the enabling of the
interrupt source associated with each ISR.



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