Q for inline arm assembly: 'M' constraint?

Bryce Schober bryceman@dpzone.com
Fri Oct 17 17:12:00 GMT 2003


Richard Earnshaw wrote:

> inline int fixp_mul_32s_nX( int a, int b, char n ) {
> 	int res, tmp;
> 	int p = 32-n;
> 	__asm__ __volatile__ (
> 		"smull	%0, %1, %2, %3			\n\t"
> 		"movs	%0, %0, lsr %4			\n\t"
> 		"adc	%1, %0, %1, lsl %5		\n\t"
> 		: "=&r" (res), "=&r" (tmp)
> 		: "r" (a), "r" (b), "rM" (n), "rM" (p)
> 	);
> 	return res;
> }
> 
> This allows the compiler to use a register or a constant in the range 
> 0-31.  But it's quite possible that you will always get a register passed 
> in this case.

Ok, I've tried this, and you're right, I always get a register, but why? 
  Is there some way I can define this function so as to only allow 
constants for "n"?  What further baffles me:

inline int fixp_mul_32s_nX( int a, int b ) {
	int res, tmp;
	const char n = 8;
	const char m = 32 - n;
	__asm__ __volatile__ (
		"smull	%0, %1, %2, %3				\n\t"
		"movs	%0, %0, lsr %4				\n\t"
		"adc	%1, %0, %1, lsl %5			\n\t"
		: "=&r" (tmp), "=&r" (res)
		: "r" (a), "r" (b), "M" (n), "M" (m)
	);
	return res;
}

This function has the same problem.  Is the compiler that stupid?  Do I 
really have to put the constant directly in the asm like "M" (24)?  Is 
it just me, or does the "M" constraint seem useless?  Am I expecting too 
much?  Is there some other way to do what I'm trying to?

Thanks,
- Bryce

-- 
Bryce Schober
Design Engineer
Dynon Avionics, Inc.
www.dynonavionics.com

---
[This E-mail scanned for viruses by digiposs.com]


------
Want more information?  See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/
Want to unsubscribe? Send a note to crossgcc-unsubscribe@sources.redhat.com



More information about the crossgcc mailing list