Testing an application build with H8300 cross compiler

[William A. Gatliff]

Mohammad:

> 
> I have build a small application test.srec using h8300-hitachi-hms-gcc 
> compiler.
> Is it possible to test the application using h8300-hitachi-hms-gdb.
> I the answer is yes then what is the exakt procedure.
> I remember that I saw some mail on this archive where it was mentioned 
> that to run
> gdb a simulated hardware is used and then with the help of gdb it is loaded.
> I would appreciate if someone could send me the exakt procedure.

When you start up gdb, see if it accepts the following command:

(gdb) target sim

If it does, then it has a CPU instruction set (not peripherals)
simulator.  You then have to load the application and run it.  You
usually have to use a linker command file that's compatible with the
simulator.  Hopefully someone else here knows more about this than me!

> Further I have another question.  I have hitachi board with ram 32k
> and when I build my application with a small os-kernel, the
> resulting srec file became around 33k.  Now my question is, is the
> size of srec file(33k) is the true size or does it contain extra
> symbols which are not loaded to the target and actual size may be
> less than 33k.  If the above is true i.e. srec file contatin extra
> symbols then how can I find the actual size of a srec file.  any
> help in this regard

If you look at an srec file with your text editor, you'll see that
it's an ASCII representation of your binary data.  As such, an srec
file is at least twice as large as the binary data it represents. So a
33k srec file contains about 16k of data.


HTH,

b.g.


> thanks in advance
> regards
> /Mohammad
> 
> 
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-- 
Bill Gatliff
bgat@billgatliff.com

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